Data Conversions/Analog Mixed-Signal ICs - Offered in Spring semester only

Course and Contact Information  
Instructor: Sang-Soo Lee
Office Location: ENGR 259
Telephone: (408) 924-3950
Email: sang-soo.lee@sjsu.edu
Office Hours: MW 5:00 PM – 5:45 PM, Other time by appointment
Class Days/Time: MW 6:00 PM – 7:15 PM
Classroom: Clark Building 324
Prerequisites: EE223 & Graduate standing or instructor consent

Course Description  
Study of different architectures for analog to digital convertors and digital to analog convertors. System level modeling & simulation. Design considerations and techniques for circuit implementation. Data conversion testing methods. 

Course Format 
This course will be delivered in-person format. In certain circumstances, however, part of it will be delivered online through live zoom meeting, and the other part will be conducted asynchronously through the learning materials presented in the course Canvas. You are responsible for regularly checking the Canvas to learn any updates on syllabus, handouts, notes, assignment instructions, etc. Students will have the access to use the Cadence IC design lab computers if they want to or if they do not have the equipment to run the Cadence software required for the course.  

Faculty Web Page and MYSJSU Messaging  
https://www.sjsu.edu/people/sang-soo.lee/

Course Learning Outcomes (CLO)  
Upon successful completion of this course, students will be able to:
1. Understand the concept of INL, DNL, ENOB, THD, SNR, and SNDR of data converters
2. Model, analyze, and design different data converters architectures and the key analog circuits
3. Use modern engineering CAD tools for computations, modeling, simulations, analysis, and design
4. Verify the theory with hands-on Spectre circuit simulations

Required Texts/Readings  
Textbook
There is no required textbook. Lecture notes, slides, and papers will be posted in Canvas.

Other Readings
The following reference books are recommended as supplementary readings. 
1. Analog Integrated Circuit Design, 2nd Edition, by Carusone, Johns and Martin, Wiley, 2011 
2. M. Pelgrom, Analog-to-Digital Conversion, Springer, 2017
3. Gustavsson, Wikner, Tan, CMOS Data Converters for Communications, Kluwer, 2000
4. F. Maloberti, “Data Converters, Springer, 2007
5. B. Razavi, Data Conversion System Design, IEEE Press, 1995
Selected publications from journal of solid-state circuits (JSSC), international solid-state circuit conference (ISSCC), VLSI circuit conference, and custom integrated circuits conference (CICC) may be provided for readings. Papers can be downloaded from IEEE Xplore website.

Other technology requirements / equipment / material 
To be successful in this course, make sure your computers or devices have:
• Reliable internet access
• VPN & remote access to connect to SJSU Cadence Lab computer
• Access to Canvas. Ensure your web browser and browser settings are Canvas compatible

Course Requirements and Assignments  
Assignments and the final design project are mainly based on Cadence Spectre simulations and are closely related to the topics discussed in the class. Information on how to setup and run the Cadence simulation tools will be provided, and students are required to master this CAD tool by practicing Cadence tutorials provided by the instructor. The final design project requires extensive simulations using Cadence Spectre. Each student must write a project report in power point slide format and submit the pdf version of the report including the design procedure, key simulation data, images, and graphs to Canvas to receive a credit. More details on the design project will be provided in the course Canvas.

 “Success in this course is based on the expectation that students will spend, for each unit of credit, a minimum of 45 hours over the length of the course (normally three hours per unit per week) for instruction, preparation/studying, or course related activities, including but not limited to internships, labs, and clinical practice. Other course structures will have equivalent workload expectations as described in the syllabus.”

Final Examination
The date of the exam is shown on the course schedule section of the course syllabus. There will be no make-up exam and those absent will receive no credit. Students must write their answers clearly in an organized fashion. Further instructions on exam rule will be provided in the course Canvas.

Grading Information
Homework  30%
Design project  30%
Final exam  40%

Determination of Grades
90% and above  A
89% - 85%  A minus
84% - 82%  B plus
81% - 79%  B
78% - 75%  B minus
74% - 72%  C plus
71% - 69%   C
68% - 65%  C minus
64% - 62%   D plus
61% - 59%  D
58% - 55%  D minus
below 55%  F

Classroom Protocol
Students will turn their cell phones off or put them on vibrate mode while in class. They will not answer their phones in the class. During the online class, students will mute themselves unless they need to speak for questions and answers.

Classroom Recording Policy
Students are not allowed to record (audio or video) in this class except in accordance with ADA accommodations. Students are not allowed to post class materials including videos in any other online site.

University Policies
Per University Policy S16-9 ,relevant university policy concerning all courses, such as student responsibilities, academic integrity, accommodations, dropping and adding, consent for recording of class, etc. and available student services (e.g. learning assistance, counseling, and other resources) are listed on Syllabus Information web page (https://www.sjsu.edu/curriculum/courses/syllabus-info.php). Make sure to visit this page to review and be aware of these university policies and resources.

Study Resources
SJSU has designated available classrooms for students to use for studying, attending online classes, and collaborating with other students. The 21 classrooms are located in buildings around the campus. In addition to the classrooms, study space is available in the King Library and Peer Connections.
A Study Resources (https://www.sjsu.edu/learnanywhere/campus-resources/study-resources.php) page has been added to the Campus Resources tab on the Learn Anywhere site to help students find these spaces.  The rooms are available August 19 through December 6, 2021. No reservations are required. The students can just go to the room, set themselves up, and start working.

EE Department Honor Code 
The Electrical Engineering Department will enforce the following Honor Code that must be read and accepted by all students. 

“I have read the Honor Code and agree with its provisions. My continued enrollment in this course constitutes full acceptance of this code. I will NOT: 
• Take an exam in place of someone else, or have someone take an exam in my place 
• Give information or receive information from another person during an exam 
• Use more reference material during an exam than is allowed by the instructor 
• Obtain a copy of an exam prior to the time it is given 
• Alter an exam after it has been graded and then return it to the instructor for re-grading 
• Leave the exam room without returning the exam to the instructor.” 

Measures Dealing with Occurrences of Cheating 
• Department policy mandates that the student or students involved in cheating will receive an “F” on that evaluation instrument (paper, exam, project, homework, etc.) and will be reported to the Department and the University. 
• A student’s second offense in any course will result in a Department recommendation of suspension from the University.

For More Information, contact:

Prof. Sang-Soo Lee at SJSU
sang-soo.lee@sjsu.edu