Analog Integrated Circuits - Offered in Fall semester only

Course and Contact Information
Instructor: Sang-Soo Lee
Office Location: ENGR 259
Telephone: (408) 924-3950
Email: sang-soo.lee@sjsu.edu
Office Hours: MW 5:00 PM – 5:45 PM, Other time by appointment
Class Days/Time: MW 7:30 PM – 8:45 PM
Classroom: ENGR 343
Prerequisites: Graduate standing  
 
Course Description
Introduction to analog integrated circuits. Bipolar and MOS transistor models. Analysis and design of monolithic operational amplifiers. Frequency response. Feedback amplifier theory and design. Applications to specific case studies, such as phase-locked oscillators and wide-band amplifiers. Switched-capacitor filters.

Course Format 
This course will be delivered in-person format. In certain circumstances, however, part of it will be delivered online through live zoom meeting, and the other part will be conducted asynchronously through the learning materials presented in the course Canvas.    

Course Learning Outcomes (CLO)
Students will acquire the ability to: characterize and model MOS transistors, bias and operate transistors in amplifiers with different characteristics, understand high performance layout with minimum parasitic, utilize Cadence Spectre circuit simulation tools to characterize various analog circuits, determine the trade-off among linearity, bandwidth, gain and power dissipation of amplifiers, design stable multi-stage amplifiers, apply frequency compensation techniques for amplifiers, design temperature and supply independent bandgap reference and switched-capacitor circuits.

Upon successful completion of this course, students will be able to:
1. Design advanced biasing circuits, operational amplifiers, and switched-capacitor circuits.
2. Understand the concept of noise, distortion, stability, phase margin, voltage swing, slew-rate, and gain-bandwidth product of amplifiers.
3. Use modern engineering CAD tools for computations, simulations, analysis, and design of analog and mixed-signal circuits.
4. Verify the theory with hands-on Cadence Spectre circuit simulations.

Required Texts/Readings 
Textbook
There is no required textbook. 
Other Readings
Lecture notes, slides, and technical papers will be posted in Canvas. The following reference books are recommended as supplementary readings. 
1. Design of Analog CMOS Integrated Circuits, 1st Edition, by Behzad Razavi McGraw-Hill, 2001
2. CMOS Circuit Design, Layout, and Simulation, 3rd Edition, by R. Jacob Baker, IEEE Press, Wiley, 2010
3. Analog Integrated Circuit Design, 2nd Edition, by Tony Chan Carusone, David A. Johns and K. Martin, Wiley, 2011 
4. Analysis and Design of Analog Integrated Circuits, 5th Edition, by Gray, Hurst, Lewis and Meyer, Wiley, 2009

Other technology requirements / equipment / material 
Students are required to have a computer to run Cadence Spectre circuit simulator by connecting to the Cadence lab computer via VPN access. Students can come to the Cadence IC design lab (ENGR 289) if they want to or if they do not have the computer to run the Cadence software required for the course.  

Course Requirements and Assignments
Homework assignments and the final design project are mainly based on Cadence Spectre simulations and are closely related to the topics discussed in the class. Information on how to setup and run the Cadence simulation tools will be provided, and students are required to master this CAD tool by practicing Cadence tutorials provided by the instructor. The final design project requires extensive circuit simulation in Cadence and students must submit a formal project report to Canvas before deadline to be eligible to receive a credit. Non-restricted MOSFET transistor models will be provided for assignments and the project. More details on the design project will be provided as the lectures progress. 

 “Success in this course is based on the expectation that students will spend, for each unit of credit, a minimum of 45 hours over the length of the course (normally three hours per unit per week) for instruction, preparation/studying, or course related activities, including Cadence Spectre simulations. Other course structures will have equivalent workload expectations as described in the syllabus.”

Midterm and Final Examinations  
The date of the exams is shown on the course schedule section of the course syllabus. There will be no make-up exam and those absent will receive no credit. Students must write their answers clearly in an organized fashion and submit the answer sheets to Canvas. Further instructions on exam rule will be provided 2 weeks before the exams.

Grading Information
Homework  20%
Midterm exam  20%
Design project  25%
Final exam  35%

Determination of Grades
90% and above  A
89% - 85%  A minus
84% - 82%  B plus
81% - 79%  B
78% - 75%  B minus
74% - 72%  C plus
71% - 69%   C
68% - 65%  C minus
64% - 62%   D plus
61% - 59%  D
58% - 55%  D minus
below 55%  F

Classroom Protocol
Students will turn their cell phones off or put them on vibrate mode while in class. They will not answer their phones in the class. During the online class, students will mute themselves unless they need to speak for questions and answers.

Classroom Recording Policy
Students are not allowed to record (audio or video) in this class except in accordance with ADA accommodations. Students are not allowed to post class materials including videos in any other online site.

University Policies
Per University Policy S16-9, relevant university policy concerning all courses, such as student responsibilities, academic integrity, accommodations, dropping and adding, consent for recording of class, etc. and available student services (e.g. learning assistance, counseling, and other resources) are listed on Syllabus Information web page (https://www.sjsu.edu/curriculum/courses/syllabus-info.php). Make sure to visit this page to review and be aware of these university policies and resources.

Study Resources
SJSU has designated available classrooms for students to use for studying, attending online classes, and collaborating with other students. The 21 classrooms are located in buildings around the campus. In addition to the classrooms, study space is available in the King Library and Peer Connections.

A Study Resources (https://www.sjsu.edu/learnanywhere/campus-resources/study-resources.php) page has been added to the Campus Resources tab on the Learn Anywhere site to help students find these spaces.  The rooms are available August 19 through December 6, 2021. No reservations are required. The students can just go to the room, set themselves up, and start working.

EE Department Honor Code 
The Electrical Engineering Department will enforce the following Honor Code that must be read and accepted by all students. 

“I have read the Honor Code and agree with its provisions. My continued enrollment in this course constitutes full acceptance of this code. I will NOT: 
• Take an exam in place of someone else, or have someone take an exam in my place 
• Give information or receive information from another person during an exam 
• Use more reference material during an exam than is allowed by the instructor 
• Obtain a copy of an exam prior to the time it is given 
• Alter an exam after it has been graded and then return it to the instructor for re-grading 
• Leave the exam room without returning the exam to the instructor.” 

Measures Dealing with Occurrences of Cheating 
• Department policy mandates that the student or students involved in cheating will receive an “F” on that evaluation instrument (paper, exam, project, homework, etc.) and will be reported to the Department and the University. 
• A student’s second offense in any course will result in a Department recommendation of suspension from the University.

For More Information, contact:

Prof. Sang-Soo Lee at SJSU
sang-soo.lee@sjsu.edu