Wong, Hiu Yung

Associate Professor

M-PAC Lab

Introduction to Quantum Computing: From a Layperson to a Programmer in 30 Steps: Springer free with VPN; Amazon

Quantum Computing Architecture and Hardware for Engineers: Step by Step: Springer free with VPN; Amazon

Email

Preferred: hiuyung.wong@sjsu.edu

Telephone

Preferred: 408-924-3910

Education

Ph.D. EECS, University of California, Berkeley (2006)
M.Phil. Computer Science and Engineering, Chinese University of Hong Kong (2001)
B. Eng. Computer Engineering, Chinese University of Hong Kong (1999)

Bio

Hiu Yung Wong is an Associate Professor at San Jose State University. He received his Ph.D. degree in Electrical Engineering and Computer Science from the University of California, Berkeley in 2006. From 2006 to 2009, he worked as a Technology Integration Engineer at Spansion. From 2009 to 2018, he was a TCAD Senior Staff Application Engineer at Synopsys.

He received the Industry Sponsored Research Award and ERFA RSCA Award in 2024, the AMDT Endowed Chair Award, the Curtis W. McGraw Research Award from ASEE Engineering Research Council in 2022, the NSF CAREER award and the Newnan Brothers Award for Faculty Excellence in 2021, and Synopsys Excellence Award in 2010. He is the author of the book, "Introduction to Quantum Computing: From a Layperson to a Programmer in 30 Steps". He is one of the founding faculties of the Master of Science in Quantum Technology at San Jose State University.

His research interests include the application of machine learning in simulation and manufacturing, cryogenic electronics, quantum computing, and wide bandgap device simulations. His works have produced 1 book, 1 book chapter, more than 120 papers, and 10 patents.

Major Awards:

Emeritus and Retired Faculty Association Faculty Research and Creative Activity Award, 2024-2025
2023 Industry Sponsored Research Award
2022 Curtis W. McGraw Research Award (ASEE Engineering Research Council).
Silicon Valley AMDT Endowed Chair in Electrical Engineering, 2022
NSF CAREER Award, 2021
Newnan Brothers Award for Faculty Excellence, 2021.
Synopsys Excellence Award (1 out of every ~500 employees), 2010
Sir Edward Youde Memorial Fellowships for Overseas Studies, 2001

Services:

Chair, Curriculum & Research Committee, Academic Senate (Spring 2023 - )
Senator (Fall 2022 - ), San Jose State University (office hour 1pm-2pm Monday. Please email me for Zoom link.)
EE Graduate Advisor (2023 -)
Editors:
- Associate Editor, IEEE Access
- Guest Editor, JVST-B, speical issue on "Reliability and Stress-related Phenomena in Nano and Microelectronics"
Co-Chair and Technical Program Chair, International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (2024)
Technical Program Committee (TPC) for International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) (2020-)
Co-Chair, 16th International Conference on Reliability and Stress-related Phenomena in Nano and Microelectronics (IRSP 2019)
IEEE EDS-SCV/SF Secretary (2018 -2019) Treasurer (2019-2021) Chair (2022 - )
IEEE EDS-SCV/SF executive committee board (2018 - )
Senior Member of Institute of Electrical and Electronics Engineers (IEEE)
Workshop Moderator: “Circuit Reliability: Advanced nodes concerns and CAD tools flows” 2018 IEEE International Reliability Physics Symposium (IRPS)
Reviewer: IEEE Electron Device Letter (EDL) and others
Judge: The Synopsys Championship (the Santa Clara County science fair for students in grades 6-12), Sciencepalooza! (for students in grades 9-12 in East San José)